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Conforms to IESS-308
Two-chip ADSP2115 implementation
Configurable bit rates of 256 kbps or more
Choice of RS code parameters
Configurable bypass of RS-CODEC
Phase locking of Tx / Rx clocks
Block-diagonal depth 1/4/8/16 interleaver
Configurable bypass of interleaver
Minimum end-to-end delay
TTL / RS-422 interface
Single +5V power supply, 1.5W
Outer code for IDR links
Adaptable to PCN protocol requirements
Adaptable to Mobile Satellite Services (MSS) requirements
Standard code for MCPC VSAT links
Burst-error correction
Concatenated coding schemes